Home » GaN/SiC » Solving Demanding Thermal Requirements by Combining GaN Transistors with Advanced Magnetics Design
Utilizing GaN devices to reduce concentrated heat is a different but more efficient and cost-effective way to meet the growing power density requirements of the market.
If you keep increasing the power density of a power converter, eventually, the thermal design will become the bottleneck – the unwanted temperature increase will limit the further size reduction unless the concentrated heat is mitigated. Recognizing this, the industry has applied an array of comprehensive and expensive thermal design techniques to enable higher power density. Thinking out of the box, utilizing GaN transistors and a GaN-enabled advanced magnetics design to reduce the concentrated heat is a different but more efficient and cost-effective way to meet the growing power density requirements of the market. This article will delve into this concept and provide a proof of concept with details of a commercially available power adapter.
Getting the Heat Out – a Quick Review
A variety of approaches have been used to reduce the heat loss through copper shielding, thermal pads, including thermal interface materials (TIMS), and thermal glue. Figure 1 shows a summary of the implementation of different thermal solution improvements. With these different approaches, the RthJA is progressively reduced to a value less than 30°C/W.
Figure 1: Adapter thermal solutions have made both horizontal and vertical thermal improvements.
It should be noted that significant RthJA reduction for the power switch can be achieved by applying proper thermal design. Minimizing the heating concentrations is another way to meet thermal requirements. To do this, designers need to consider changes for advanced/higher power density applications.
Out of the Box Approach to Advanced Thermal Solutions
With GaN enhancement mode devices, users have experienced significantly improved efficiency (4x lower losses), reduced size (4x smaller) and weight (4x lighter) as well as 10% to 20% lower system cost. At the same time, these improvements have allowed the rated power output and power density of end designs to dramatically improve as well. Thermal management to reduce the junction to ambient thermal resistance (RthJA) has been an ongoing design activity for the power electronics industry and for adapter designers. This article will use the optimization of the LLC stage for high density phone/laptop adapters as an example of the improvements that are possible when GaN transistors are combined with advanced magnetics design.
LLC Design and Magnetic Optimization
Managing key heat sources is especially important in high power adapters. In the typical laptop adapter, the rectifier power factor correction (PFC) stage precedes the synchronous rectifier (SR)-LLC D/DC converter stage. (See Figure 2.) The secondary winding on the LLC transformer and synchronous rectifier (SR) of an adapter are the hottest spots due to high secondary side currents. In a typical layout, the secondary side and SR are normally very close to each other to minimize conduction losses of the thermally coupled PCB traces. This is typically the hottest point in an adapter and limits further power density improvement. For example, the maximum magnetic flux density reduces as the temperature increases. To ensure that the magnetic core does not saturate with the high currents, sometimes a larger size must be selected.
How will GaN and magnetic design will solve this issue? Let’s start from the LLC basics.
Figure 2. The typical architecture for AC/DC laptop adapters includes a rectifier PFC stage and a switched reluctance-LLC DC/DC converter stage.
To satisfy the resonant zero voltage switching (ZVS) condition equation for the LLC stage, the minimum deadtime (tdeadmin) can be calculated as follows:
tdeadmin = 16 · Co(tr) · Lm · fs
Lm is the magnetizing inductance of transformer, and,
fs is the switching frequency.
A key consideration for design improvements is the time it takes to charge/discharge the transistor output capacitor, Co(tr), (where Coss= CDG+CDS). This parameter provides a new path for improvements in high efficiency and high-density LLC converters. A smaller Co(tr) indicates a faster and more desirable charge/discharge time. With a lower the value of the effective Co(tr), less magnetizing current is required for a given drain to source transition time. In Figure 3, the GaN vs. Si Co(tr) performance comparison shows a dramatic difference. A GaN high-electron-mobility transistor (HEMT) has approximately a 10x smaller Co(tr) than a Si super junction (SJ) MOSFET.
Figure 3: Co(tr) is a critical parameter for high density and high efficiency LLC designs.
With GaN transistors, there are three optimization options:
To achieve the objectives of higher efficiency, lower temperature, higher power density with lower cost, the proposed solution uses the second option: a higher switching frequency and reduced winding turns while maintaining the same core size.
Increasing the operating frequency of the design reduces the number of turns required, which increased the winding area. The end result reduces the winding loss and the concentrated heat on the secondary side. The parameters of the traditional vs the improved transformer design, including the revised operating frequency are summarized in Table 1.
Table 1. Transformer parameter comparison of the traditional design vs. the improved design.
Figure 4 shows how the working points of both the primary and the secondary change as a result of the improved LLC design. The higher switching frequency increase allows increased cross-sectional area that reduces the ACR and the copper losses with an end result of reduced total losses even though the core loses are higher.
Figure 4. Improved transformer design impacts the ACR/DCR winding losses in both the primary (a) and secondary (b) windings.
Even though the core loss increases as the frequency increases in the improved design, the copper loss reduction more than makes up for it and produces an overall reduced power loss. Table 2 shows the overall system loss difference between the traditional design and the improved design. Note the reduction of 96% and 83% from the RDC of the primary and secondary, respectively. Also, the total power loss is 23% lower.
Table 2. Overall system loss of the traditional design vs. the improved design
Experimental verification shows good correlation between simulation and experiments. Figure 5 shows the waveforms and thermal images from the design change. With the higher switching frequency (309kHz instead of 231kHz), adapter efficiency increases 0.4% and the transformer secondary temperature is reduced by more than 20°C.
Figure 5: Waveforms and the resulting thermal images of the traditional design vs the improved design identify the improvements.
A 250W AC/DC GaN Adapter Design
A turnkey adapter solution with improved LLC design is shown in Figure 6. Using GaN transistors, this new high-power density and high-efficiency adapter reference design is 50% smaller and has 40% less weight. The cased turnkey solution is an ultra-slim design with a height of 22mm. It achieves a power density of 16W/in3 with a 96% peak efficiency and meets EN55032 Class B electromagnetic interference (EMI) and IEC62368-1 safety standards. The temperature rise is below 45°C at a 40°C ambient.
Figure 6: A 250W AC/DC GaN adapter turnkey solution incorporating the improved LLC converter design is 50% smaller.
The significant performance advantages of GaN transistors over silicon devices can result in end designs with highly desirable improvements. Specifically, in high power density adapters, the secondary side of the LLC converter is usually the thermal bottleneck. To mitigate the concentrated heat, increasing the switching frequency in an improved design (from 230kHz to 310kHz) reduces the transformer winding losses. Due to the superior performance of GaN devices and the improved transformer design, a 0.4% full load efficiency improvement and more than 20°C temperature reduction are achieved.
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